Trapped charge and stress induced leakage current (SILC) in tunnel SiO2 layers of de-processed MOS non-volatile memory devices observed at the nanoscale

M. Lanza; M. Porti; M. Nafría; X. Aymerich; G. Ghidini; A. Sebastiani

doi:10.1016/j.microrel.2009.06.016

Trapped charge and stress induced leakage current (SILC) in tunnel SiO2 layers of de-processed MOS non-volatile memory devices observed at the nanoscale

M. Lanza, M. Porti, M. Nafría, X. Aymerich, G. Ghidini, A. Sebastiani

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

In this work, Conductive Atomic Force Microscope (CAFM) experiments have been combined with device level measurements to evaluate the impact of an electrical stress applied on MOS structures with a 9.8 nm thick SiO2 layer for memory devices. Charge trapping in the generated defects and leakage current measured at the nanoscale have been correlated to the measurements obtained on fully processed MOS structures. Crown Copyright © 2009.

Original language	English (US)
Pages (from-to)	1188-1191
Number of pages	4
Journal	Microelectronics Reliability
Volume	49
Issue number	9-11
DOIs	https://doi.org/10.1016/j.microrel.2009.06.016
State	Published - Sep 1 2009
Externally published	Yes

ASJC Scopus subject areas

Surfaces, Coatings and Films
Atomic and Molecular Physics, and Optics
Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality
Condensed Matter Physics

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10.1016/j.microrel.2009.06.016

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AU - Lanza, M.

AU - Porti, M.

AU - Nafría, M.

AU - Aymerich, X.

AU - Ghidini, G.

AU - Sebastiani, A.

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AB - In this work, Conductive Atomic Force Microscope (CAFM) experiments have been combined with device level measurements to evaluate the impact of an electrical stress applied on MOS structures with a 9.8 nm thick SiO2 layer for memory devices. Charge trapping in the generated defects and leakage current measured at the nanoscale have been correlated to the measurements obtained on fully processed MOS structures. Crown Copyright © 2009.

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IS - 9-11

ER -

Trapped charge and stress induced leakage current (SILC) in tunnel SiO2 layers of de-processed MOS non-volatile memory devices observed at the nanoscale

Abstract

ASJC Scopus subject areas

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