Variability-Aware Design of RRAM-Based Analog CAMs

Content Addressable Memories (CAMs) are considered a key enabler for in-memory computing (IMC). IMC shows an order of magnitude improvement in energy efficiency and throughput compared to traditional computing techniques. Recently, analog CAMs (aCAMs) were proposed as a means to improve storage density and energy efficiency. In this work, we propose two new variability-aware aCAM cells to improve data encoding and robustness against noise and process variations, as compared to existing aCAM cells. We propose a methodology to choose the margin and interval width for data encoding. In addition, we perform a comprehensive comparison against prior work in terms of the number of intervals, noise sensitivity, dynamic range, energy, latency, area, and probability of failure. The results show that our designs have the capability to encode up to 4 bits of storage and achieve up to 24 intervals compared to 6 intervals for the existing 4T2M2S design, with 5-10× lower latency and 10-30× lower energy consumption, while achieving a lower probability of failure. This makes them suitable candidates for neuromorphic computing and routing applications as will be discussed in the results section.