TY - JOUR
T1 - Wavy Channel TFT-Based Digital Circuits
AU - Hanna, Amir
AU - Hussain, Aftab M.
AU - Hussain, Aftab M.
AU - Hussain, Aftab M.
AU - Omran, Hesham
AU - Alsharif, Sarah M.
AU - Salama, Khaled N.
AU - Hussain, Muhammad Mustafa
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledged KAUST grant number(s): CRG-1-2012-HUS-008
Acknowledgements: This work was supported by the King Abdullah University of Science and Technology within the Office of Sponsored Research under Grant CRG-1-2012-HUS-008. The review of this paper was arranged by Editor R. M. Todi.
PY - 2016/2/23
Y1 - 2016/2/23
N2 - We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.
AB - We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.
UR - http://hdl.handle.net/10754/622615
UR - http://ieeexplore.ieee.org/document/7416011/
UR - http://www.scopus.com/inward/record.url?scp=84976217365&partnerID=8YFLogxK
U2 - 10.1109/TED.2016.2527795
DO - 10.1109/TED.2016.2527795
M3 - Article
SN - 0018-9383
VL - 63
SP - 1550
EP - 1556
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 4
ER -