TY - JOUR
T1 - Wavy channel thin film transistor architecture for area efficient, high performance and low power displays
AU - Hanna, Amir
AU - Sevilla, Galo T.
AU - Ghoneim, Mohamed T.
AU - Hussain, Aftab M.
AU - Bahabry, Rabab R.
AU - Syed, Ahad A.
AU - Hussain, Muhammad Mustafa
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledged KAUST grant number(s): CRG-1-2012-HUS-008
Acknowledgements: This work is supported under Competitive Research Grant Funding Program (CRG-1-2012-HUS-008) by KAUST Office of Competitive Research Funds (OCRF).
PY - 2013/12/23
Y1 - 2013/12/23
N2 - We demonstrate a new thin film transistor (TFT) architecture that allows expansion of the device width using continuous fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.5× increase in 'ON' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar 'OFF' current value, ~100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers an interesting opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
AB - We demonstrate a new thin film transistor (TFT) architecture that allows expansion of the device width using continuous fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.5× increase in 'ON' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar 'OFF' current value, ~100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers an interesting opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
UR - http://hdl.handle.net/10754/563159
UR - http://doi.wiley.com/10.1002/pssr.201308282
UR - http://www.scopus.com/inward/record.url?scp=84896035070&partnerID=8YFLogxK
U2 - 10.1002/pssr.201308282
DO - 10.1002/pssr.201308282
M3 - Article
SN - 1862-6254
VL - 8
SP - 248
EP - 251
JO - physica status solidi (RRL) - Rapid Research Letters
JF - physica status solidi (RRL) - Rapid Research Letters
IS - 3
ER -